MOLECULAR BEAM EPITAXIAL GROWTH AND FABRICATION OF

MICROWAVE AND PHOTONIC DEVICES FOR HYBRID

INTEGRATION ON ALTERNATIVE SUBSTRATES

 

APPROVED BY

DISSERTATION COMMITTEE:

________________________________

________________________________

________________________________

________________________________

________________________________

 

Copyright

by

Alwin James Tsao

1993

 

MOLECULAR BEAM EPITAXIAL GROWTH AND FABRICATION OF

MICROWAVE AND PHOTONIC DEVICES FOR HYBRID

INTEGRATION ON ALTERNATIVE SUBSTRATES

by

ALWIN JAMES TSAO, B.S.E.E., M.S.E.E.

DISSERTATION

Presented to the Faculty of the Graduate School of

The University of Texas at Austin

in Partial Fulfillment

of the Requirements

for the Degree of

DOCTOR OF PHILOSOPHY

THE UNIVERSITY OF TEXAS AT AUSTIN

May 1993

ACKNOWLEDGEMENTS

I would like to first thank my advisor, Professor Dean P. Neikirk, whose guidance, support, patience, "gee-whiz" ideas , and friendship have allowed me to finish this work. To Professors Ben G. Streetman and Joe C. Campbell, I owe a great deal of thanks for their interest in this work and use of their facilities. I would also like to thank the other members of my committee, Professors Willis Adcock and Mike Downer, for their time and effort. To Terry Mattord, I would like to express my appreciation for his time and help on equipment related issues. In addition, I would like to thank Professor Alex DeLozanne for use of his scanning electron microscope used to obtain all the SEM micrographs shown in this study.

I have been very fortunate to work with many outstanding graduate students in the Microelectronics Research Center (MRC). I would like to thank Stu Wentworth for his help in the area of fabrication and equipment related issues. To my "ENS 405 brothers", Douglas Miller, Vijay Reddy and Kiran Gullapalli, I would like to extend a heartfelt thanks for their friendship, for the many discussions we've had, and the help they have given to me over the years. I would also like to thank Saiful Islam for many useful discussions related to processing and CPWs. In addition, I would like to thank the members of the MBE group for the pleasure of working with them and learning from them: Ananth Dodabalapur, Tom Block, Tommy Rogers, Kayvan Sadra, Albert Shih, Anand Srinivasan, Alex Anselm, Chad Hansing, and Andy Tang. To Carl "Goobaby" Kyono, Kevin Klein, and Marty Agnostinelli, I thank them for the profit and the fun I had in the high-stakes tennis matches we played. I would also like to thank Ravi "Truck" Kuchibhotla for useful discussions on LEDs, lasers, and his opinions on everything. For the other members of "Team Neikirk", I would like to express my sincere appreciation for their assistance in many lab related issues. In addition, I would like to thank Bernice Wooton for her help in taking care of many administrative tasks.

Finally, I would like to acknowledge the sources of financial support for this research: Texas Advanced Technology Program, Joint Services Electronics Program and the VLSI Fabrication Lab at the University of Texas at Austin.

 

MOLECULAR BEAM EPITAXIAL GROWTH AND FABRICATION OF MICROWAVE AND PHOTONIC DEVICES FOR HYBRID INTEGRATION ON ALTERNATIVE SUBSTRATES

Alwin James Tsao, Ph.D.

The University of Texas at Austin, 1993

Supervisor: Dean P. Neikirk

In recent years, there has been considerable work on improving the high frequency and output power properties of double barrier resonant tunneling diodes (DBRTDs) which exhibit negative differential resistance (NDR) in their DC current-voltage (DC-IV) characteristics. Structural device parameters such as quantum well, barrier, and spacer layer thicknesses significantly impact the peak-to-valley current ratio (PVCR), the peak current density (Jp), the difference between the peak voltage and the valley voltage (DV), and the difference between the peak current density and the valley current density (DJ). Furthermore, variations in the dopant profiles, thickness of the spacer layers, and the contact resistance can significantly alter device characteristics. Optimization of the ohmic contacts to the DBRTDs was investigated. The impact of barrier asymmetries in AlAs/GaAs and AlAs/AlGaAs/GaAs DBRTD structures were studied. Through the use of an AlGaAs/AlAs "chair" barrier or composite barrier, a PVCR of 6.3 was measured. The impact of intentional small barrier thickness asymmetries on the DC-IV characteristics of AlAs/GaAs high current density DBRTDs was also examined. The thickness of the asymmetric barrier is adjusted nominally in increments of a half-monolayer based on growth rates using Reflection High Energy Electron Diffraction (RHEED) intensity oscillations. From this study, an AlAs/GaAs DBRTD was produced with a PVCR of 5.6. These PVCRs remain the highest reported to date for their respective material systems.

The typical current densities of AlAs/GaAs DBRTDs are in the range of 20 kA/cm2 - 100 kA/cm2. As a result of the significant device heating that can occur, the Epitaxial Lift Off (ELO) technique was used to remove the DBRTDs from their original substrates for subsequent hybrid integration to hybrid substrates of higher thermal conductivity. The ELO technique was used to create optically controlled Schottky contacted coplanar waveguide (CPW) phase shifters which are bonded to transparent substrates. In a similar fashion, ELO light emitting diodes (LED) such as AlGaAs/GaAs double heterostructure and multi-quantum well LEDs have been grown and hybrid bonded to transparent and pre-patterned substrates.

Table of Contents

 

Chapter 1 Introduction 1

Chapter 2 Molecular Beam Epitaxy 4

2.1 Introduction 4

2.2 Description of the Varian Gen II MBE System 7

2.3 Substrate Preparation Before Epitaxial Growth 9

2.4 Growth Kinetics 9

2.5 Reflection High Energy Electron Diffraction (RHEED) 12

2.6 GaAs on Si MBE Growth 16

Link to pdf file for Chapters 1 & 2

Chapter 3 Hybrid Integration using the Epitaxial Lift Off Method 18

( some pictures of ELO results )

Chapter 4 AlAs/GaAs Double Barrier Resonant Tunneling Diodes 45

Chapter 5 Intentional Barrier Asymmetries in AlAs/GaAs Double Barrier Resonant Tunneling Diodes 78

Chapter 6 Application of the ELO Technique to Microwave and Photonic Devices 96

Chapter 7 Summary and Conclusion 129

Appendix 1 Parametric Summary of All DBRTD and QWITT Devices 131

Appendix 2 AZ5214E Photolithographic Process using

the HTG System 3 Aligner 140

Appendix 3 General Epitaxial Lift Off Procedure 142

link to pdf file for appendices 1-3 .

References 145

VITA 159

 

List of Figures

Figure 2.1

Illustration showing a typical growth chamber. After M.B. Panish [Ohr92]. 5

Figure 2.2

Cutaway view of the Varian Gen II MBE System. Illustration taken from the Varian Gen II Users Manual. 6

Figure 2.3

Illustration showing the growth of GaAs from Ga and As2. Taken from a reproduction of the work of C.T. Foxon in The Technology and Physics of Molecular Beam Epitaxy, E.H.C. Parker, editor 11

Figure 2.4

Illustration showing the growth of GaAs from Ga and As4. Taken from a reproduction of the work of C.T. Foxon in The Technology and Physics of Molecular Beam Epitaxy, E.H.C. Parker, editor 11

Figure 2.5

2 x 4 diffraction pattern, (0 °), for GaAs in As-stabilized growth mode. 13

Figure 2.6

4 x 2 diffraction pattern, (0 °), for GaAs in Ga-stabilized growth mode. 13

Figure 2.7

Illustration depicting nucleation and island growth that occurs on the surface, diffraction of the electron beam, and the corresponding RHEED intensity oscillations taken from the specular spot. Taken from The Materials Science of Thin Films, M. Ohring [Ohr92]. 14

Figure 3.1

Illustration (not drawn to scale) of the ELO technique as an epitaxial film is being separated from its original growth substrate. The tension in the Apiezon W black wax induces a radius of curvature, R, of several centimeters in the epitaxial film which promotes removal of etch by-products from the etch front. [YaG87]. 20

Figure 3.2

Illustration showing typical cross-section of ELO layer structure for two-terminal mesa isolated device that can be tested both before ELO and after ELO. Note that mesa etch must be controlled such that the etch does not penetrate the AlAs release layer. 22

Figure 3.3

Illustration of the application of Apiezon W black wax to mesa isolated AlGaAs/GaAs heterojunction device . To make sure that good step coverage of the black wax over the mesas occurs, a teflon press is used to press the softened wax over the edges of the mesas. The wax can be softened either by raised temperature or through the use of solvents such as TCA and toluene. 25

Figure 3.4

Illustration of dome-shape in black wax carrier on mesa isolated AlGaAs/GaAs heterostructures. The AlAs release layer is exposed at all edges before inserting the sample into the 10% HF etch. 26

Figure 3.5

Illustration showing the edges of a mesa isolated AlGaAs/GaAs heterostructure (i.e. AlAs/GaAs double barrier resonant tunneling diodes, AlGaAs/GaAs double heterostructure LEDs) being peeled back by the tension in the Apiezon W black wax as the AlAs release layer is being etched out by 10% HF. 27

Figure 3.6

Illustration showing the suspension of an ELO sample in the 10% HF. Upon complete separation, the substrate drops away from the ELO film. 28

Figure 3.7

Illustration of uniform pressure applied by vacuum bag to wax carrier as ELO film is pressed together with an alternative substrate for a VDW bond. A lint free Kim-wipe is placed between the wax carrier and vacuum bag to prevent pinching off of the vacuum. 31

Figure 3.8

SEM micrograph showing the complete mesa isolation of an 3 mm thick ELO film into 4mm by 4mm islands. The "mushroom" cap on top of the GaAs island is the remaining photoresist after the mesa etch. 34

Figure 3.9

SEM micrograph showing an ELO film that has been bonded to P-20 silver polyimide. Note that the size of the silver flakes appear to be on the order of the ELO film thickness and does not provide a smooth flat bond line. 35

Figure 3.10

SEM micrograph of an ELO device bonded to an In/AuCr coated glass substrate. The specific contact resistivity of the ohmic contacts was indirectly extracted and found to be 8 x 10-6 W-cm2. The mechanical contact and bond strength were poor. Note the roughness of the In at the edges of the ELO film. 38

Figure 3.11

SEM micrograph of an ELO device bonded to a Pd/AuCr coated Si substrate. The best possible backside specific contact resistivity was indirectly extracted and found to be 1 x 10-5 W-cm2. The mechanical contact and bond strength were very good. Note the smooth morphology of the Pd surface and the excellent bond at the edges of the film. 39

Figure 3.12

Cross-sectional schematic of a silicon-on-insulator (SOI) sample used in the ELO process. A standard 49% HF solution was used to etch out the oxide as

the Si overlayer was held to a Apiezon W black wax carrier. 42

Figure 4.1

Illustration of the G-G conduction band profile of a typical AlAs/GaAs DBRTD, similar to those grown by MBE in this work. The conduction band offset between GAlAs and GGaAs is 1.04 eV. 46

Figure 4.2

Plots of the transmission coefficient versus electron energy for an AlAs/GaAs single barrier structure and a double barrier structure. The barriers are 17Å and the quantum well of the DBRTD is 50Å. Plot courtesy of K.K. Gullapalli. 47

Figure 4.3

Figure 4.3: (a) Illustration depicting the operation of an AlGaAs/GaAs DBRTD as a voltage is applied to the device. Taken from Sollner, et.al.[SoG83]. (b) J-V characteristics of an AlAs/GaAs DBRTD with specific parameters of interest highlighted: Peak voltage (Vp), Valley voltage (Vv), Peak current density (Jp), Valley current density (Jv), DV = Vv - Vp, and DJ = Jp - Jv. 49

Figure 4.4

Conduction band profiles of both the G-point and X-point minima for an AlAs/GaAs DBRTD. The offset values were taken from Liu [Liu87 ]. 54

 

Figure 4.5

Illustration depicting the cross-sectional layer structure and conduction band profile of a typical AlAs/GaAs QWITT. (Not drawn to scale.) 55

Figure 4.6

Measured J-V characteristics for an AlAs/GaAs DBRTD and an AlAs/GaAs QWITT with the same quantum well structure. The quantum well consists of 17Å AlAs barriers, a 50Å GaAs well and an sinj. 0.3 (1/W-cm). 57

Figure 4.7

Variation of valley current and PVCR versus temperature for AlGaAs/GaAs DBRTDs. Taken from [VaL89]. 61

Figure 4.8

Cross-sectional layer structure for a "baseline" AlAs/GaAs DBRTD and the growth interrupts associated with the MBE growth of the device. 63

Figure 4.9

Impact of series resistance on the I-V characteristics of an AlAs/GaAs QWITT diode with additional series resistances of 10W, 20W and 30W added to the I-V curves. Note that DV decreases with increasing series resistance. 64

Figure 4.10

SEM micrograph showing an alloyed Ni/AuGe/Ni ohmic contact on top of a mesa isolated AlAs/GaAs DBRTD. This contact was made using a metallization lift off process where AZ1350J-SF photoresist is used to define and lift off the contact pattern. Note the metal flags at the edge of the metallization due to the lift off procedure. 68

 

 

Figure 4.11

Schematic drawing of Cox-Strack structures used to extract the specific contact resistivity of the ohmic contact metallization 69

Figure 4.12

Cross-sectional layer schematic for a spacer layer/doping spike/spacer layer combination placed downstream (on the anode side) of an asymmetric AlAs/GaAs/AlAs quantum well. The current density is therefore reduced in such a structure, but the DV should be increased. The purpose of the AlAs release layer will be discussed in Chapter 6, section 6.3. 75

Figure 4.13

J-V characteristics of an AlAs/GaAs DEM-QWITT with a spacer layer/doping spike/spacer layer combination placed downstream (on the cathode side) of an asymmetric AlAs/GaAs/AlAs (8ML/18ML/6ML) quantum well. Note that two measurements were taken as a result of the amount of hysteresis observed in the J-V characteristics 76

Figure 5.1

Measured J-V characteristics for a baseline, nominally symmetric AlAs/GaAs DBRTD. Slight asymmetries in the J-V characteristics are observed where the Jp is higher, the Vp is higher, and the PVCR is lower, all in the forward bias mode (Forward bias here implies the electron traverses the bottom AlAs barrier first.) 79

Figure 5.2

Illustration showing the cross-sectional layer structure of the AlAs/GaAs DBRTDs used to examine the impact of intentional barrier thickness asymmetries on the DC-IV characteristics. Note reverse bias implies electron injection through the top AlAs barrier first, whereas forward bias implies electron injection through the bottom AlAs barrier first. The top AlAs barrier thickness, T, was altered to produce nominal layer thicknesses of 5.0, 5.5, 6.0, 6.5, 7.0, and 8.0 ML. 81

 

Figure 5.3

Peak current density vs. top AlAs barrier thickness for both simulation and experimental results. 83

Figure 5.4

Peak current density vs. top AlAs barrier thickness for both simulation and experimental results. 84

Figure 5.5

Peak voltage vs. top AlAs barrier thickness for both simulation and experimental results. 85

Figure 5.6

Peak to valley current ratio vs. top AlAs barrier thickness for experimental results. 86

Figure 5.7

Ratio of the forward and reverse bias DC-IV parameters versus the top AlAs barrier thickness. This graph displays the asymmetry in DC-IV parameters as top AlAs barrier thickness is varied. The device with a 5.5 ML top AlAs barrier is shown to be most symmetric. 87

Figure 5.8

Cross-sectional diagram of the Al0.2Ga0.8As/AlAs/GaAs "chair" barrier DBRTD used in this study. The AlGaAs "chair" was placed on the top AlAs barrier based on the higher PVCRs obtained when the "baseline" DBRTDs were reverse biased. Note that minor corrections have been made in the doping profiles and layer thicknesses in this cross-sectional diagram . 90

Figure 5.9

Conduction band profiles of both the G-point and the X-point minimums for the Al0.2Ga0.8As/AlAs/GaAs "chair" barrier DBRTD. All energies shown are in reference to the G-point of GaAs. The offset values for GaAs/AlAs are from Liu [Liu87] and Al0.2Ga0.8 from Adachi [ Ada85] . 91

Figure 5.10

Measured J-V curves for a standard "baseline" AlAs/GaAs DBRTD and the AlGaAs/AlAs/GaAs "chair" barrier DBRTD, taken by this author. Note that in the reverse bias mode, the "chair" barrier DBRTD has a slightly smaller Jp than the standard DBRTD. 93

Figure 5.11

Cross-sectional diagram of the Al0.30Ga0.70As/AlAs/GaAs "chair" barrier QWITT discussed in this section. Here both the AlAs and Al0.3Ga0.7As portions of the chair barrier were thinned by one monolayer to examine the impact on the measured Jp and PVCR. 94

Figure 6.1

Cross-sectional diagram of the layer structure for the first ELO AlAs/GaAs DBRTD (MBE Run# 1043) grown in this study. Note that this sample was grown on a semi-insulating substrate and therefore could not be tested before ELO. Subsequent DBRTDs (MBE Run#1376) and QWITTs (MBE Runs# 1437 and 2028) were grown on n+ GaAs substrates with heavily n+ doped AlAs release layers. 98

Figure 6.2

Typical forward bias J-V characteristics for the ELO DBRTD and a baseline DBRTD. The closed circles are the measurements taken for a baseline AlAs/GaAs DBRTD and the open circles are the measurements taken for an ELO AlAs/GaAs DBRTD. Note in the J-V characteristic of the ELO DBRTD on In/AuCr/glass that the valley current rises faster and the PVCR and the DV are reduced. 101

 

Figure 6.3

SEM micrograph of an ELO device bonded to an In/AuCr coated glass substrate after an anneal at 350°C. Note the roughness of the In at the edges of the ELO film. This type of bond did not survive a "Scotch" tape test. 102

Figure 6.4

Illustration showing a mesa isolated ELO DBRTD or QWITT bonded to a Pd/AuCr coated silicon substrate. This bond is initially created using a vacuum bag/oven combination which provides the proper pressure/temperature combination to cause a solid phase reaction between the GaAs and Pd to form Pd4GaAs. 107

Figure 6.5

SEM micrograph of an ELO DEM-QWITT bonded to a Pd/AuCr coated n+ silicon substrate after an overnight bond in a vacuum bag. Note the smooth surface with no gaps, bumps or defects at the edges of the ELO film. This bond is much improved over the In based bonds in terms of bond strength and reduced defects. 108

Figure 6.6

Illustration showing a mesa isolated ELO DBRTD or QWITT bonded to a typical Pd/Ge/Pd coated silicon substrate. This bond is created using a vacuum bag/oven combination, discussed in Chapter 3, which provides the proper pressure/temperature combination to cause a solid phase reaction between the GaAs and Pd to form Pd4GaAs. Subsequently, the ELO film/Pd/Ge/Pd combination are alloyed at 300°C for 5 minutes in order to form an ohmic contact. 110

Figure 6.7

Characteristic J-V data for the ELO Chair barrier QWITT before and after ELO. Note that the PVCR in both bias directions improved slightly with the only significant degradation in device characteristics occurring in the DV due to a higher backside contact resistance after ELO. 112

Figure 6.8

SEM micrograph of particles on the order of 1mm preventing a reliable bond at the edge of an ELO QWITT layer and its alternative silicon substrate. 115

Figure 6.9

Photograph showing regions where there were very small bubbles that burst or broke upon rapid thermal annealing the backside ohmic contacts. 116

Figure 6.10

SEM micrograph of a crack that formed in an ELO DEM-QWITT and its subsequent release from the surrogate substrate. 117

Figure 6.11

SEM micrograph showing the peeling up of the top half of an AlAs/GaAs DBRTD, above the quantum well, which was not covered properly with Apiezon W black wax during the lift off in 10% HF. 118

Figure 6.12

Illustration depicting a typical Schottky contacted CPW phase shifter before ELO. The device processing and testing were performed by M. Saiful Islam. The ELO processing of this device was performed by this author. 120

Figure 6.13

Illustration showing the ELO CPW bonded to a clear fused quartz slide using either cyanoacrylates or VDW bonds. 122

Figure 6.14

Hybrid back-to-back bonding of an ELO CPW and an ELO double heterostructure LED or multi-quantum well (MQW) LED. Both the ELO CPW and ELO LED are bonded to the surrogate quartz substrate with cyanoacrylate. 124

Figure 6.15

Illustration showing a typical MQW LED type structure designed for emission of light with a wavelength of 750nm using software written by T.R. Block. 125

Figure 6.16

Illustration showing the planarized ELO DBRTD or QWITT utilizing an air-bridge for device isolation and an LT-GaAs layer for backside isolation. 127

 

List of Tables

Table 3.1

Physical Properties of Apiezon W Waxes (from [Bid81]). 23

Table 4.1

Table of specific DC-IV parameters for a standard AlAs/GaAs DBRTD grown using the As2 cell and the AlAs/GaAs DBRTD using the As4 cell. Note that all the layer thicknesses including those in the quantum well are the same for both devices, as shown in Figure 4.8. 73

Table 4.2

Characteristic J-V data for the AlAs/GaAs DEM-QWITT with an asymmetric quantum well and a spacer layer/doping spike/spacer layer combination placed downstream from the quantum well. 77

Table 5.1

Comparison of J-V data for a "baseline" AlAs/GaAs DBRTD and the AlGaAs/AlAs/GaAs "chair" barrier DBRTD. Note that the "chair" barrier DBRTD obtained a PVCR of 6.3 at room temperature, which remains the highest PVCR to date for an AlGaAs/GaAs DBRTD. Both of the above devices were grown by MBE, processed, and DC-IV tested by this author. 92

Table 5.2

Characteristic J-V data for a "chair" barrier QWITT structure. 95

Table 6.1

Characteristic J-V data for the ELO DBRTD (MBE Run# 1043) and a standard baseline DBRTD. Note the higher peak voltage, lower DV, lower DJ, and lower PVCR of the ELO DBRTD. 100

Table 6.2

Characteristic J-V data for an AlAs/GaAs DBRTD (MBE Run# 1376) both before and after ELO. Again note the higher peak voltage, lower DV, lower DJ, and lower PVCR of the ELO DBRTD. Although the device was bonded to Si, a reduction in the valley current density was not seen. As shown in Figure 6.3, it is believed that the mechanical and thermal contact to the backside of the ELO DBRTD did not provide an improvement over the original substrate. 104

Table 6.3

Characteristic J-V data for an AlAs/GaAs DEM-QWITT (MBE Run# 2028) both before and after ELO. Note that the PVCR is actually higher and the valley current lower after ELO, in both bias modes. The DV has decreased after ELO, indicating that the backside ohmic contact has an overall higher series resistance. 106

Table 6.4

Characteristic J-V data for an Al0.3Ga0.7As/AlAs/GaAs QWITT (MBE Run# 1437) both before and after ELO. Note that the PVCR is actually higher and the valley current lower after ELO, in both bias modes. The DV has decreased after ELO, indicating that the backside ohmic contact has an overall higher series resistance. 111

Table 6.5

Thermal conductivities for various materials. Taken from B.S. Perlman [Col76] . 113

Table 6.6

Measurement taken on an ELO CPW before and after ELO. The measurements were taken by M. S. Islam [IsT91] . 123